Embodiments of the present disclosure relate to a semiconductor device, and more particularly to a semiconductor device for performing address conversion so as to prevent degradation of cell characteristics.
A non-volatile memory, such as a flash memory or a phase change memory, has a limited number of write operations capable of being executed in only one cell. Therefore, if only some regions of the non-volatile memory are intensively used, a total lifespan of the non-volatile memory can be reduced.
A volatile memory such as a DRAM may incur a row hammering phenomenon. The row hammering phenomenon will hereinafter be described in detail. When a specific word line is toggled between an enabled state and a disabled state due to a large number of enabled times of the specific word line, the amount of charge stored in a cell capacitor coupled to a contiguous word line is changed such that data stored in the memory cell is deteriorated. The above-mentioned operation is referred to as the row hammering phenomenon.
In the case of using a semiconductor device including at least one memory, some regions of the memory are intensively accessed such that unexpected deterioration may occur in the accessed regions. As a result, a lifespan of the semiconductor device may be reduced or unexpected malfunction may occur in the semiconductor device.